1. Technical Field
This disclosure relates to electronic design automation (EDA). More specifically, this disclosure relates to parameterized cell caching in EDA applications.
2. Related Art
Electronic design automation (EDA) tools allow for the hierarchical design of integrated circuits, in which portions of large designs may be divided into manageable subsections which can be worked on independently by designers. Specifically, an EDA tool can create and manipulate a design using OpenAccess which defines a standardized data model and interface for representing and accessing the design.
A parameterized cell (pcell) allows a designer to create a design that can be adapted to a particular situation based on a set of parameters. Specifically, a designer can provide zero or more parameter values to a pcell during instantiation. If a parameter value is not provided to the pcell, a default value for that parameter is used. Next, the source code of the pcell is executed which uses the supplied and/or default parameter values to generate the customized instance of the pcell.
Today's circuit designs can include a large number of pcell instances. It is computationally inefficient to execute the source code of the pcell every time a cell instance is created. Hence, what is needed are systems and techniques for improving efficiency of EDA applications which use pcells.